Selection system for matrix displays requiring AC drive waveforms

ABSTRACT

Alternating drive waveforms with zero direct voltage content for matrix or multiplexed displays are produced using low voltage, binary-level switching in the selection drive circuitry. Selection drive circuitry, and the breakdown voltage requirements thereof, are minimized by synthesizing the required high voltage waveforms applied to both the X and Y axes of display from lower amplitude components.

United'istag Alt et al.

SELECTION SYSTEM FOR MATRIX DISPLAYS REQUIRING AC DRIVE WAVEFORMS Inventors: Paul Matthew Alt, Yorktown Heights; Peter Pleshko, Katonah; Eugene Stewart Schlig, Somers, all of N.Y.

Assignee:

Filed:

Appl. No.; 429,459

International Business Machines Corporation, Armonk, N.Y.

Dec. 28, 1973 References Cited UNITED STATES PATENTS 7/1974 Bringol 340/324 M OTHER PUBLICATIONS Two-Frequency, Compensated Threshold Multiplexing of Liquid Crystal Displays Alt et al., IBM Tech. Discl. Bull., Vol. 16, No. 5, October 1973, pp. 1578-1581.

Primary Examiner-Marshall M. Curtis Attorney, Agent, or Firm-John A. Jordan 5 7] ABSTRACT Alternating drive waveforms with zero direct voltage content for matrix or multiplexed displays are produced using low voltage, binary-level switching in the selection drive circuitry. Selection drive circuitry, and the breakdown voltage requirements thereof, are minimizeci by synthesizing the required high voltage Waveforms applied to both the X and Y axes of display from lower amplitude components.

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U.S. Patent oct. 7,1975 sheet 3 of 6 3,911,421

FIG.3

SINoIIE SELEGT Y A SIGNAL 1 1 I I ROBE VTHILILELIII'LIIIIILELELELIIIIIIIIILIIELII SGIIANE-wAvE o 2VTH. COMPOSITE SIIIGIIE SIGNAL 0 D B PLUS C INFO. SELECT Uli- LI-U- E SIGNAL Nm VTHIIIIUIILELIINIIIIIILEIILVLIIIIILIULI SQUARE-WAVE O- V A11-1115111, TSILILJ-IIIINIIIIILLVUIJIIIIIIG=IE+IIIE+II 2VIII- wAvEEoIIN II NINIIS N AGNGSS o GELL 'ZVIH U.S. Patent oct. 7,1975 sheet 4 @f6 3,911,421

F I G. 4

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F l G 6 VP=HVD /VD Y COMPOSITE II SIIIGGL SIGNAL VD Y (D) --Np-ND= III-I IND ZVDI AND GoNPoS IIL I7 INPG. SIGNAL ZVD- (H) -vp2vD= IA-zIvD o rn PIIINIIIvE IA-IIND SIIIoL SIGNAL SINGGE I G I I SIIIGGE VD/I I A so. wAvL IBI INFO

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BACKGROUND OF THE INVENTION The present invention relates to apparatus and techniques for driving matrix displays. More particularly, the present invention relates to an improved selection system for generating the decode information necessary to drive matrix display devices requiring AC drive waveforms.

Various types of matrix display devices, as known in the art, require AC drive waveforms with a minimal direct voltage component. It is known, that normally by employing AC waveforms with minimal direct voltage component, a maximum useful life span for the display is achievable. Typical of display devices whoseoperating life is increased in accordance with reduction in the direct voltage component of the AC drive waveforms therefore, are display devices of the liquid crystal variety. For example, Marlowe et al in U.S. Pat. No. 3,654,606 and Mao in U.S. Pat. No. 3,653,745, describe increasing the operating life of a nematic liquid crystal with alternating voltage excitation rather than direct voltage excitation, although they do not describe minimizing the direct voltage component of this alternating voltage. Typically, bipolar voltage levels are used to produce the alternating voltage.

As recognized by the patentees in the above cited patents, for example, one of the difficulties encountered in attempting toy employ alternating voltage excitation of a liquid crystal display matrix, resides in the fact that complex circuits are required to drive the row-column interconnections, in accordance with* the information to be displayed. Accordingly, efforts to achieve a relatively long operating life in the nematic liquid crystal of a matrix display, for example, have resulted in increased manufacturing difficulty and a corresponding increase in production costs for the decode drive circuitry required to address such matrix displays.

lt should be recognized that AC drive waveforms with a negligible direct voltage component are desirable not only for matrix addressing of liquid crystal displays, but also for matrix addressing of the cells of any of a variety of displays. For example, it may be desirable to drive electroluminescent matrix displays, gas panel displays, etc. with AC waveformsy having a negligible direct voltage component.

In matrix displays, it is also required that unselected cells or sites exhibit negligible contrast with respect to the background. ln general, this latter requirement tends to constrain the number of matrix row or columns that may be multiplexed. In some instances, for example where a liquid crystal matrix display is involved, the multiplexing capability may be increased by using a high frequency signal to increase the threshold voltage, and therefore permit larger drive voltages. With these larger drive voltages, circuits are needed (one for each horizontal and vertical line terminal of the matrix display) having a breakdown voltage exceeding the peak-to-peak voltage of the drive waveform. Because of the zero direct voltage requirement, the peak voltage required for good contrast is doubled.

SUMMARY OF THE INVENTION Inaccordance with the principles of the present invention, there isv provided a versatile and economical selection systemvfor multiplexing matrix displays retion.

quiring drive waveforms with a minimal direct voltage component. More particularly, in accordance with the principles of the present invention, a simplified selection system isprovided for multiplexing matrix displays requiring AC waveforms across the cells thereof, with such `,selection system having the capability of providing 4a wide variety of selection waveforms including 2:1,

3:1 and RMS selection signals, for example, with the selection signal being either a DC pulse or an AC pulse. The selection system is designed with a minimum of parts, and permits standard integrated unipolar logic circuits and low voltage drivers to be used.

The manner by which the above selection system with its attendant advantages is carried out involves synthesizing the required waveform from two components, one containing the information concerning cell selection or strobe timing, and the other being a steady square wave. These signals are generatedV separately and combined in such a way that the peak-to-peak voltage appears only across the display cells. Accordingly, in accordance with the principles of the present invention, by summing square waves and low amplitude logical signals, the larger amplitude periodically inverted drive signals required by matrix displays are simply produced using unipolar circuits with a breakdown voltage considerably less then the breakdown voltage required using conventional techniques. Not only does the design of the selection system, in accordance with the principles of the present invention provideto the displays cells AC drive signals with zero DC content using unipolar circuits with a minimum of breakdown requirements, but in addition such system permits a wide variety of selection waveforms including 3:1, 2:1, and RMS selection with either an AC or DC pulse, without altering any of these circuit configurations therein.

It is, therefore, an object of the present invention to provide an improved selection system for multiplexing the rows and columns of a matrix display.

It is a further object of the present invention to provide a selection system for multiplexing information into a matrix display having display cells which are most effectively responsive to alternating wave forms with a negligible direct voltage component.

It is yet a further object of the present invention to provide a selection system for matrix displays requiring AC drive waveforms which is simple in design and has a minimum ofl circuit components, and which permits the use of circuit components having low breakdown voltages.

lt is yet still a further object of the present invention to provide a selection system for matrix displays which selection system operates to produce Ac drive waveforms with minimum direct voltage component to select display cells with either 2:1, 3:1, or RMS selection in either a DC pulse mode or an AC pulse mode.

The foregoing and other objects, features and advantages of the invention will be apparent from the following more particular description of a preferred embodiment of the invention, as illustrated in the accompany drawing. i

'BRIEF DESCRIPTION OF THE DRAWING FIG. l shows the selection system for matrix displays,

in accordance with the principles of the present inven- FlG. 2A shows an ExclusiveeOr gate, with its cornmon node biased by a square-wave as employed in FIG.

l, which figure is to be used in conjunction with the description in regard to FIG. 2B, as well as FIGS. 3, 4, 5, and 6.

FIG. 2B shows the manner by which the selection system of FIG. l produces alternating drive waveforms across display cells in a 2:1 selection scheme, using a DC pulse mode.

FIG. 3 shows the manner by which the selection system of FIG. l produces alternating drive waveforms across display cells in a 2:1 selection scheme, using an AC pulse mode.

FIG. 4 shows the manner by which the selection system of FIG. 1 produces alternating drive waveforms across ldisplay cells in a 3:1 selection scheme, using a DC pulse mode.

FIG. 5 shows the manner by which the selection system of FIG. l produces alternating drive waveforms across display cells in a 3:1 selection scheme, using an AC pulse mode.

FIG. 6 shows the manner by which the selection system of FIG. l produces alternating drive waveforms across display cells in an RMS selection scheme, using a DC pulse mode.

DETAILED DESCRIPTION OF THE DRAWING As shown in FIG. l, the selection system, in accordance with the principles of the present invention, acts to provide AC drive waveforms to matrix display cells l. In this regard, it should be recognized that typically the matrix display cells are arranged in an .r-y array whereby selected cells are turned on" by application of partial-select voltage waveforms to the appropriate .r and y lines which intersect at the selected cell. Although typically a matrix array of display cells may be l() X 100, it is clear that the number of cells in the array is somewhat a matter of design choice subject, however, to constraints imposed by the characteristics of the `particular cells as these characteristics affect scanning ability. Thus, certain type displays, such as dynamic scattering liquid crystal displays, may be limited to approximately a 100 X l0() array.

Regardless of the exact size of the array, it is clear that any useful array will require considerable drive circuitry and, accordingly any techniques which act to reduce the quantity and complexity of such drive circuitry, will act to considerably reduce the cost of the selection system for the display. Although in the preferred embodiment shown in FIG. l a row-at-a-time matrix selection multiplexing scheme is described, it is clear that other schemes may, as readily, be employed. For example, the selection system in accordance with the principles of the present invention may, as readily, be utilized in a character-at-a-time multiplexing arrangement.

In accordance with a row-at-a-time matrix selection multiplexing scheme, signal waveforms are applied to the rows of the display matrix in repetitive sequence. Typically, the signal waveforms include strobe pulses applied a row at a time. Signal waveforms applied to the columns of the display matrix include information signals simultaneously applied to all columns such as to determine whether the cells on the particular strobed row are "on" or off, Information signals are derived by means of logical operations on the data to be displayed, and the change in synchronism with the shift of the strobe pulse from row to row determines uniquely what is to be displayed.

ln FIGS. 2B-6 the waveforms are shown for two full scans of the display. By way of example, the information pulse sequence and its timing relative to that of the strobe pulse is such that the particular cell in question sees one half-select and one full-select excitation during each cycle. It will be on because of the full-select excitation.

As shown in FIG. 1, the x or horizontal lines of the matrix display are strobed, one by one, in response to signals from strobe select signal generator 3. While the x lines are strobed one by one in response to signals from strobe select generator 3, the y or vertical lines all receive sets of information concurrently from information select signal generator 5, in synchronism with the strobe pulses. Thus, for example, when x line 7 is being strobed, all y lines 9-9n simultaneously receive information in accordance with which cells along the x row being pulsed by line 7, are to be lit. Although FIG. 1 shows the x lines being strobed in sequence by strobe signals while the y lines receive the information signals, it is readily apparent that the y lines could as easily be strobed by the strobe signals and the x lines receive the information signals.

In order to achieve the reduction in circuit requirements in terms of quantity, complexity, and voltage breakdown levels therefore, in accordance with the principles of the present invention, the strobe signals and information signals required to produce an AC drive waveform across the display cells with a negligible direct voltage component are synthesized in a convenient and an efficient manner. Basically, the synthesis technique employed involves summing signals, each having a smaller peak-to-peak amplitude than the final waveform. One of the two signals contains all of the information content, While the other of the two signals is a steady-state square wave reference signal, The information content signal is generated, as will be explained more fully hereinafter, by an Exclusive-OR operation on the steady-state square wave signal and a binary level-type logical (select) signal, which has the effectof logically inverting the output in synchronism with the square wave. This logical inversion conditions the signal for the polarity inversion which results when another of said steady-state square wave signals, as a reference signal, is added thereto. It will be seen that by the superposition of these signals, the information content of the strobe signals and information signals is allow to ride on top of the latter reference square wave signal. Accordingly, the logical circuits employed to generate the information content float on top of the circuits employed to generate the reference waveform, whereby the breakdown voltage required for each of these circuits is only some fraction of the peak-to-peak output voltage therefrom. In addition to lowering the breakdown voltage required of conventional driving circuit arrangements, the driving arrangement of the present invention allows any one of several selection schemes to be employed without any modification to the circuits, it only being necessary to vary the pulse repetition rate and amplitude of the square waves ernployed.

With reference to the overall operation of the selection system of FIG. l, the particular data, image, etc. to be displayed on matrix display 1 originates in display information generator ll. In this regard, it is clear that any of a variety of apparatus may be employed to generate display information. Typically, display information generator l1 would comprise a digital computer. For example, a general purpose digital computer could be programmed to produce the required display information. Alternatively, display information generator generator l1 could merely comprise a storage device which serially reads out with time the information to be displayed. Regardless of the source of display information, it is evident that it may be local or remote.

In the usual case, display information generator ll comprises a ground referenced arrangement. Since the X-decoder (strobe) portion 13 and the Y-decoder (information) portion 15 of the selection system of FIG. l are each referenced, respectively, to square wave generators 17 and 19 which generators may in turn each be referenced to an AC bias, it is desirable to ernploy isolation devices at the point where these decoders interface with ground referenced system. In order to minimize the number of isolation devices required, it is preferred to place same at a point in the system where the signal information flows largely serially. As shown in FIG. 1, isolators 2l and 23 act to provide isolation between the logic circuits employed in decoders 13 and l5 and ground referenced display information generator l1. Any of a variety of arrangements may be ernployed for isolators 2l and 23. However, it should be recognized that isolators 2l and 23 may be eliminated.

In addition to generating display information, display information generator 1 1 may conveniently act to provide synchronization (sync) signals. As shown in FIG. l, square wave generators 17, 19, 25, and 27 are all in synchronization. In this regard, square wave generators 17 and 25 each act to produce square waves in phase with one another with possibly different amplitudes, the difference being that the square waves produced by square wave generator is referenced to the square wave produced by square wave generator 17, while the latter square wave is referenced to either ground or an AC bias level, depending upon whether an AC bias signal is applied across terminals 29 or 3l. Likewise, square wave generators 19 and 27 each produce square waves in phase with one another with possibly different amplitudes the difference being the point to which the square waves produced therefrom are referenced.

The in-phase square waves produced by square wave generators 17 and 25 are the complements of the inphase square waves produced by square wave generators 19 and 27. Although square wave generators 17 and 19 are shown for convenience as being two separate generators, it is clear that since the square waves produced therefrom are the complements of one another` a single square wave generator with complementary outputs may readily be employed. For example, a single flip-flop may be employed for square wave geny erators 17 and 19. ln this regard, it is not always desirthe emitter-collector circuits thereof. Likewise, al-

though square wave generators 25 and 27 have been shown, for convenience, as separate entities, it is clear that any of a variety of techniques may readily be ernployed for purposes of consolidating the functions thereof. v

In addition t0 providing sync signals for square wave generators 17, 19, 25, and 27, display information generator 11 also supplies sync signals to strobe select signal generator 3 and information select signal generator 5. The latter signal generators may be in synchronization with the synchronized square wave generators. Although any of a variety of arrangements'might be employed, strobe select signal generator 3 most conveniently would include a simple counter arrangement for readily providing the sequential Strobe signals, oneby-one, to Exclusive-OR gates 33-33n. Likewise, information select signal generator 5 would most conveniently include parallel output information storage means for readily providing concurrent information signals to each of the respective Exclusive-OR gates 35-35n, the respective sets of concurrent information signals being sequentially provided in synchronization with the respective strobe pulses. Typically, information select signal generator 5 would most simply and conveniently include binary counter and shift register arrangements for providing the information signals therefrom.

As shown in FIG. 1, each of the X-drivers 37-37n are respectively responsive to signals from Exclusive-OR gates 33-33n. Likewise, each of the respective Y- drivers 39-39n are respectively responsive to signals from Exclusive-OR gates 35-3511. As shown, strobe select signal generator 3, square wave generator 25, each of Exclusive-OR gates 33-33n and each of X-drivers 37-3711 are referenced to common node 41; In like fashion, each of the circuit components within Y- decoder subsystem l5 is referenced to common node 43. Accordingly, it can be see that the logical signals employed within the X-and Y-decoder subsystems are superimposed upon the respective square waves pro-V duced by square wave generators 17 and 19. It should be appreciated that although the X- and Y-decoder subsystems act in cooperation to produce AC waveforms across the matrix display cells, by utilization of the Exclusive-OR function, as referenced synchronously with a square wave, only unipolar pulses are required.

With reference to FIG. 2A, there is shown the manner in which the Exclusive-OR function operates with respect to its reference square wave bias atits common node to produce the waveforms shown in FIGS. 2B, 3, 4, 5 and 6. By synthesizing the strobe signal and information signal from two basic signals associated with each, any of a variety of AC drive waveforms with negligible net DC content, may be produced. FIGS. 2B, 3, 4, 5 and 6 depict the process by which the basic signals are combined to produce display cell drive waveforms for commonly used selection schemes.

For example, FIG. 2B depicts the process by which an AC drive waveform (D-H) for a 2:1 selection scheme using a DC pulse mode, is produced'FIG. 3, on the other hand, depicts the process by which an AC drive waveform (D-H) for a 2:,1 selection scheme using an AC pulse mode, is produced. As can be seen, the distinction between the two waveforms resides in the fact that the DC pulse waveform has a net DC component during the strobe interval, whereas the AC pulses waveform does not. However, since in the DC pulse case the polarity of the drive waveforms alternately inverts from strobe interval to strobe interval there is, then, no net DC component here either, when taken over strobe intervals.

FIGS. 4 and 5, respectively, depict the process by which AC drive waveforms (D-H) for a 3:1 selection scheme using a DC and AC pulse mode, are produced. In 3:1 selection, off cells see t-VTH while on cells see Vm, where VTH is the threshold level for the particular type of display cells employed. On the other hand, in the 2:1 selection schemes of FIGS. 2B and 3, off cell see iVm while on" cells see ;:2VT.

FIG. 6 depicts the process by which AC drive waveforms (D-H) for an RMS selection scheme are produced. In this regard, it should be noted that for certain types of display devices, e.g., RMS responding devices, optimum results are achieved using RMS selection. For example, since dynamic scattering liquid crystal display device are RMS responsive, the RMS strobe scheme of FIG. 6, as opposed to the 3:1 selection schemes of FIGS. 4 and 5, permits larger matrices to be driven.

Although there is only one Exclusive-OR gate shown in FIG. 2A, it is to be understood that each of the respective sets of waveforms shown in FIGS. 2B-6 are produced using two Exclusive-OR gates, one for each side of the particular display cell being driven. Thus, in FIG. 2B, for example, there is one Exclusive-OR gate on the strobe side of the cell to be driven which acts upon waveforms A and B to produce primitive strobe signal C, and another Exclusive-OR gate on the information side of a cell to be driven which acts upon waveforms E and F to produce primitive information signal G. As is evident, composite strobe signal D and composite information signal H, as applied across a cell to be driven, result in their difference, D-H shown in the last line of FIG. 2B.

Assume for purposes of description, that with waveforms A, B, etc. applied to the Exclusive-OR function represented in FIG. 2A, that the operation of Exclusive-OR gate 33 in FIG. l is represented. Likewise assume for purposes of description, that with waveforms E, F, etc., as shown in parenthesis, applied to the Exclusive-OR function represented in FIG. 2A, that the operation of Exclusive-OR gate 35 in FIG. l is represented. Accordingly, in this example, then, the display cell in the first row and first column of the matrix is being selectively'addressed. Where the selection scheme employed is 2:l with DC pulse signals, Exclusive-OR gates 33 and 35 in FIG. l operate in accordance with the waveform and voltage levels shown in FIG. 2B.

Thus, as shown in FIG. 2B, a strobe select signal A is applied to one input of the Exclusive-OR gate 33, as shown in FIG. l. The strobe select signal is produced by strobe select signal generator 3, in response to sync signals from display information generator ll. As shown in FIG. 2A, the strobe select signal A is applied between the one input of the Exclusive-OR gate and the common node 4l of this gate. As likewise shown in FIG. 2A, the basic strobe square wave B, shown in FIG. 2B, is applied between the other input to the Exclusive- OR gate and the common node 4l of this gate. As shown in FIG. l, the common node of all Exclusive-OR gates 33-3311 are tied to common node line 41 of the strobe subsystem. The strobe square wave B shown in FIG. 2B is produced by square wave generator 25 in FIG. 1.

With the strobe select signal A and strobe square wave B applied to Exclusive-OR gate 33 in FIG. I, for example, a primitive strobe signal C, shown in FIG. 2B, is produced between the output of the Exclusive- OR gate and its common node 4l. This is particularly shown in FIG. 2A. As can be seen with reference to the primitive strobe signal C shown in FIG. 2B, the Exclusive-OR function operates in conjunction with strobe square wave B to cause the unipolar pulses of strobe select signal Ato exhibit a periodic inversion of logical state in synchronism with B.

In order to accomplish the required shift in the levels of primitive strobe signal C, common node 4l is referenced to a square wave corresponding to strobe square wave B. As shown in FIG. 2A, the common node of the Exclusive-OR gate shown therein, is referenced to waveform B. Thus, waveforms B, which are identical in timing but may differ in amplitude, are applied between one input to the Exclusive-OR gate and its common node 4l and between its common node 41 and ground. With respect to FIG. l, square wave generator 17 produces the square wave signal applied between common node 4I of the Exclusive-OR gate and ground. With respect to FIG. 2B, it can be seen that with the common node of the Exclusive-OR gate biased by a reference square wave signal B, a composite strobe signal D is produced having a level shift with respect to the primitive strobe signal C. The composite strobe signal D comprises unipolar pulses which go between O and 2 VTH.

While Exclusive-OR gate 33 in FIG. l, in the example being described, operates to produce a composite strobe signal D, Exclusive-OR gate 35 operates to produce a composite information signal, H as shown in FIG. 2B. The application of such signals is shown more particularly in parenthesis in FIG. 2A. Thus, were the cell being selectively addressed in this example to be selected for an on" condition, information select signal generator 5 in FIG. l would act to apply information select signal pulses E (FIG. 2B) between one input to Exclusive-OR gate 35 and its common node 43. The information square wave F applied between the other input to Exclusive-OR gate 35 and its common node 43,` is produced by square wave generator 27, in FIG. l. The reference square wave signal applied between the commonk node 43 and ground to provide the level shift, in the same manner as was done with the strobe signal, is produced by square wave generator 19. In this regard, it should be noted that the complementary square waves produced by square wave generators 17 and 19 are shown in FIG. 2 as being equal in duration. Likewise, the complementary square waves produced by square wave generators 25 and 27 are described as being of equal duration. However, it is clear that these complementary square waves do not necessarily have to be of equal duration or amplitude and that variations from this approach may readily be employed.

It is also clear that rather than employ a reference square wave generator to bias each of the common nodes 4l and 43 of the X- and Y- decoder drive circuitry, respectively, a single reference square wave may be employed to bias a single axis, i.e., the common node of either the X-decoder drive circuitry 13 or Y- decoder drive circuitry 15. In accordance with such arrangement, the primitive waveforms would appear on one axis while the primitive pulse the reference square wave forms would appear on the other. It should be noted, that any of a variety of waveforms and voltage levels can be added to both the x and y axis since these waveforms and voltage levels substract to zero when applied across its associated display cell. In regard to voltage levels, it is evident that any of a variety of schemes may be employed. For example, the strobe and information pulses may vary between and'VTH. Alternatively, the strobe and information signals may vary between -VTH and 0. The particular voltage levels selected are a matter of design choice. d

Likewise, the pulse repetition rate or frequency of the select signals and square wave signals are a matter of relative design choice. In this regard, the strobe select signal may have the same pulse repetition rate or frequency as the strobe square wave signal, or may be different. In FIG. 2B, for example, the strobe select signal has a faster pulse repetition rate than the strobe square wave signal. On the other hand, it can be seen tion, then, when the matrix display l of FIG. 1 comprises dynamic-scattering liquid crystal display cells,

- the AC bias is continuously applied such as to change in FIG. 3, that the strobe select signal has a slower pulse repetition rate than the strobe square wave signal. In either event, it should be appreciated that to a great extent, the pulse repetition rate of the strobe and information select signals is determined by the scanning characteristics of the particular display device being multiplexed. Likewise, as hereinabove mentioned, to a great extent, the particular selection scheme employed is determined by the scanning characteristics of the particular display device being multiplexed. Thus, since scanned dynamic-scattering liquid crystal display cells exhibit a time-integrated response, consideration of selection schemes in regard to the maximum allowable signal amplitude requires consideration of the waveshape across the cell during an entire scan period, and not just during the strobe time. Accordingly, when dynamic-scattering liquid crystal display cells are employed, the scanning characteristics of such cells suggest that a RMS selection scan, such as depicted in FIG. 6, may be preferred.

With certain types of display cells, it has been found desirable to further bias either or both axes with an AC bias signal. The function of the AC bias signal in such cases is to change the threshold level of the display cells. Such bias may be applied to both axes, via terminals 29 and 3l, as shown in FIG. l. Alternatively, the AC bias may be applied to bias only one of the axes. When an AC bias is employed, operation is commonly referred to as a two-frequency scheme.

Where dynamic-scattering liquid crystal display cells are employed the two-frequency scheme may be preferred. In such cases, the AC bias is typically a high frequency bias. With such an arrangement it is common practice to switch the high frequency AC signal on each line, such that it is not present when a cell is being strobed into the "on condition. The switching of such high frequency AC signals, it can be seen, imposes an additional voltage breakdown requirement on the drive circuitry.

It has been ascertained, however, that only the RMS value of the high-frequency is important in determining the steady-state, time-average scattering level of a liquid crystal cell. Hence, switching off the highfrequency bias is an effective procedure only insofar as it reduces the RMS value of high-frequency signals. The percentage difference in the RMS values of a continuous high-frequency sinusoid bias and a gated highfrequency sinusoidal signal is less than 5'7f when the number of lines scanned is greater than 10. Accordingly` a continuous high-frequency bias supplied to the entire array produces approximately the same effect as when a high-frequency signal is switched or gated off when a cell is being strobed into an on condition. In accordance with the principles of the present inventhe threshold of the cells without requiring additional gating circuitry or necessitating the use of higher breakdown voltage levels. In this regard, the same results are achieved whether the AC bias is applied with opposite phases to both axes or merely to one axis.

Although specific reference has been made to the use of the AC bias with regard to dynamic-scattering liquid crystal displays, it should be appreciated that an AC bias may, likewise, be desired to change threshold levels, and the like, in other matrix display devices. Likewise, although reference has been made to the AC bias as being a high-frequency bias, it should be appreciated that the AC bias may be a low-frequency bias. Thus, where matrix display 1 in FIG. 1 is the abovementioned dynamic-scattering liquid crystal display, it may be desirable to perform the scanning function of the x and y axes with a high-frequency signal and bias the common node of square wave generators 17 and 19 with a low-frequency bias. AC bias is shown transformer coupled in FIG. 1, but other arrangements may readily be used.

With reference to FIG. 3, the manner in which a 2:1 selection scheme having AC pulse mosde waveforms is provided should be evident from the previous discussion with regard to the waveforms in FIG. 2B. As is evident, the pulse repetition rate of the strobe and information square wave has been increased such that one period thereof corresponds in duration to the duration of the strobe and information select pulses. The operation of the Exclusive-OR function upon the strobe select signal and strobe square wave signal, then, is to cause a logical inversion over half of the pulse interval of the pulses in the strobe select signal. ln the same manner as in the DC pulse mode of FIG. 2B, a strobe square wave reference signal is employed to bias the Exclusive-OR operation to provide the level shift required. In like manner, the primitive information signal and composite information signal are produced via the described exclusive-OR function.

With reference to FIGS. 4 and 5, it can be seen that the operation of the Exclusive-OR functionis the same as was described with reference to FIGS. 2B and 3, respectively. The main distinction between FIGS. 2B and 3, on the one hand, and FIGS. 4 and 5, on the other, resides in the fact that the latter Figures depictthe manner in which 3:1 selection signals are produced. Basically, in going from 2:1 to 3:1, all that is required is that simple amplitude changes be made. Thus, where the threshold of the matrix display cells is VTH, in 3:1 selection the required logical levels of the composite strobe and information signals would be between O and 3 Vm. It is clear, that the changes in logical levels may be achieved by any of a variety of techniques. For example, for the 3:1 selection case, the Exclusive-OR gate may be adjusted so that its output voltage levels as provided by its own internal floating power supply, vary between O and 2 Vm. Such an arrangement can be assumed with respect to FIGS. 4 and 5. It should be noted that although the output C and G from the Exclusive- OR gate varies between and 2 Vm, the signal employedto bias the common node of the Exclusive-OR gate varies only between 0 and VT.

With reference to the RMS selection scheme depicted by FIG. 6, it should be noted that the manner in which the waveforms have been arranged is somewhat different from the previous arrangements.

An RMS selection scheme is one which maximizes the RMS difference between the threshold and fon condition. The amplitudes of the signals are determined by factors n and V1, which are related to the display device characteristics and the number of lines to be scanned.

The waveform that appears across the display cell may be obtained by subtracting, as shown in FIG. 6, the composite information signal H from the composite strobe signal D. By substracting H from D, a RMS DC- pulse waveform is obtained, as seen by the display cell. As depicted in FIG. 6, the amplitude of the primitive strobe signal, as taken at its Exclusive-OR output, is not the same as the amplitude of the primitive information signal, as taken at its Exclusive-OR output. The primitive strobe is smaller than the composite by a factor (n l )/n and is smaller than the information square wave by a factor (n 2)/n.

Thus, the waveform appearing across the display cell, as provided by the opposing waveforms depicted in FIG. 6, appears as a bipolar pulse having periodically inverted amplitudes nVD. Where a display cell is not selected, the strobe signal across it is Vp 2VD. It is clear that RMS selection with AC pulse signals may just as well be employed.

It should be noted that the components within the respective X- and Y-decoder subsystems 13 and l5 have their own internal sources of power which are referenced to the common nodes of the respective subsystems and so float with respect to ground` The simplest arrangement for this would involve a DC battery for each component within the subsystems, or alternatively, one battery for each subsystem to be shared by all components within the subsystem. However, it is evident that, practically, the DC power for these subsystems could readily emanate from other sources, such as an AC source, so long as proper isolation is afforded to cause this DC power to float with respect to the square wave biases ori the common nodes thereof.

While the invention has been particularly shown and described with reference to preferred embodiments thereof, it will be understood by those skilled in the art that the foregoing and other changes in form and details may be made therein without departing from the spirit and scope of the invention.

What is claimed is:

l. A selection system for producing alternating drive waveforms with substantially zero net direct voltage content across the display cells of a matrix display, comprising:

first drive circuit means for sequentially providing one part of said alternating drive waveforms applied to each of the respective display terminals of one axis of said matrix display, said first drive circuit means including means to provide unipolar pulses and means coupled to said means to provide unipolar pulses to selectively invert said unipolar pulse to provide a first bipolar pulse train having a given direct voltage component, and

second drive circuit means for providing the other part of the said alternating drive waveforms applied to the display terminals of the other axis of said matrix display, Said second drive circuit means including means to provide unipolar pulses for selected ones of said display terminals of the said other axis of said matrix display and means coupled to said means to provide unipolar pulses to selectively invert said unipolar pulses to provide a second bipolar pulse train having said given direct voltage component and having pulses in synchronism with and of opposite phases from the pulses of said first bipolar pulse train, said opposite phase bipolar pulses acting to provide the said alternating drive waveforms with substantially zero net direct voltage content across selected ones of the said display cells of said matrix display with the combined arnplitudes of said opposite phase bipolar pulses being sufficient to excite said selected ones of the display cells of said matrix display.

2. The system as set forth in claim 1 wherein reference signal means are coupled to at least one of said first and second drive circuit means so that at least one of said first and second bipolar pulse trains is superimposed upon the reference signals from said reference signal means to form a composite bipolar pulse train signal such that the voltage levels exhibited by said composite bipolar pulse train signal are greater that the voltage levels exhibited by said unipolar pulses in said first and second drive circuit means.

3. The system as set forth in claim 2 wherein said reference signal means are coupled to each of said first and second drive circuit means so that each of said first and second bipolar pulse trains are superimposed upon the respective reference signals from said reference signal means.

4.. The system as set forth in claim 3 wherein the said means to selectively invert the said unipolar pulse trains in said first and second drive circuit means each include means to provide a binary level voltage waveform and binary level logic circuit means responsive to said binary level Voltage waveform to invert the said unipolar pulses therein in dependence upon the logic level of said binary level voltage waveform.

5. The system as set forth in claim 4 wherein the said means to provide a binary level voltage waveform of said first drive circuit means provides a binary level voltage waveform which is the complement of the binary level voltage waveform provided by the said means to provide a binary level waveform of said second drive circuit means.

6. The system as set forth in claim 5 wherein the reference signal means coupled to said first drive circuit means produces a waveform which is the complement of the waveform produced by said reference signal means coupled to said second drive circuit means.

7. The system as set forth in claim 6 wherein the said reference signal means coupled to said first drive circuit means produces a waveform which is in phase and coincidence with the binary level voltage waveform produced by said binary level logic circuit means of first and second drive circuit `means -'so.that*the said' means to selectively invert said unipolar pulses actsto invert alternate ones of the said unipolar pulses in accordance with the binary level of said binary level voltage waveform whereby cell selection is made in-the DC strobe pulse mode.

9. The system as set forth in claim 7"wherein the said binary level logic circuit means of each of said first and second drive cricuit means produce a binary level waveform having a frequency which is greater than the frequency of the said unipolar pulses produced by said first and second drive circuit means so thatthe said means to selectively invert said unipolar pulses acts to invert over a subinterval of the pulse interval of said unipolar pulses in accordance with the binary level of said binary level voltage waveform whereby cell selection is made inthe AC strobe pulse mode.

l0. The system as set forth in claim 7 wherein the common node of said reference signal means is biased by AC signal means.

ll. The system as set forth in claim 7 wherein said reference signal means and said first and second drive circuit means act to produce the said composite bipolar pulse train signal of an amplitude to provide 2:1 selection of said cells.

l2. The system as set forth in claim 7 wherein said reference signal means and said first and second drive circuit means act to produce the said composite bipolar pulse train signal of an amplitude to provide 3:1 selection of said cells.

13. The system as set forth in claim 7 wherein said reference signal means and said first and second drive circuit means act to produce the said composite bipolar pulse train signal of an amplitude to provide RMS selection.

14. The system as set forth in claim 13 wherein the said binary level logic circuit means of said first and second drive circuit means include Exclusive-OR gate means.

l5. The system as set forth in claim 14 wherein said display cells comprise liquid crystal display cells.

l6. A selection system for producing AC drive waveforms across the display cells of a matrix display, cornprising;

first drive circuitry means for producing strobe signals for sequentially strobing the lines of one axis of said matrix display, said first drive circuitry means including logic gate means associated with each line of said one axis of said matrix display and signal means for providing both a strobe select signal and a strobe square wave signal in synchronism therewith to said logic gate means so as to cause said strobe select signal to be logically inverted in dependence upon the logical level of said strobe square wave signal, each of said first drive circuitry logic gate means and signal means having its common node commonly connected to one another to form a common node for all of said first drive circuitry means,

second drive circuitry means for produci ng information signals for selective lines of the other axis of said matrix display, said second drive circuitry means including logic gate means associated with each line of said other axis of said matrix display and signal means for providing both an information select signal and an information square wave signal in synchronism therewith to said logic gate means so as to cause said information select signal to be logically inverted in dependence upon the logical level of said information square wave signal, each of said second'drive circuitry logic gate means and signal means having its common node commonly connected to one another to form a common node for all of said second drive circuitry means, and reference square wave generator means coupled to the said common node of at least one of said first and second drive circuitry means so as to cause at least one of said logically inverted strobe and information select signals to be superimposed upon the reference square wave signals produced by said reference square wave generator means so as to provide composite signals thereby and said AC drive waveforms across the display cells of said matrix display. 17. The system as set forth in claim 16 wherein the said signal means of said first drive circuitry means produces a strobe square wave signal which is complementary to the said information square wave signal produced by the said signal means of said second drive circuitry means.

18. The System as set forth in claim 17 wherein the said reference square wave generator means are coupled to the said common node of both said first and second drive circuitry means.

19. The system as set forth in claim 18 wherein the said reference square wave generator means coupled to the said common node of both said first and second drive circuitry means acts to produce at the said cornmon node of said first drive circuitry means a square wave which is complementary to the square wave produced at the said common node of said second drive circuitry means.

20. The system as set forth in claim 19 wherein the respective waveforms of said complementary reference square wave signals coupled to the said common node of both said first and second drive circuitry means are the same as the respective waveforms of said complementary strobe and information square wave signals therein, and are in phase and synchronism therewith.

2l. The system as set forth Vin claim 20 wherein said signal means for providing a strobe select signal act to provide a strobe select signal sequentially a line at a time to the respective x lines of said one axis of said matrix display and the said signal means for providing an information select signal act to coincidently apply an' information select signal to the respective y lines of said other axis of said matrix display each time a strobe select signal is applied to an x line.

22. The system as set forth in claim 2l wherein said first and second drive circuitry logic gate means include Exclusive-OR gates.

23. The system as set forth in claim 22 wherein said reference square wave generator means producing said complementary reference square wave signals and said signal means of said first and second drive circuitry means producing said strobe and information square wave signals each act to produce signals having a frequency less than the frequency of the said strobe and information select signals produced by the said signal means so that the AC drive waveform selection signals produced across the display cells of said matrix display comprise DC pulses over a strobe interval.

24. The system as set forth in claim 22 wherein said reference square wave generator means producing said complementary reference square wave signals and said signal means of said first and second drive circuitry means producing said strobe and infomation square wave signals each act to produce signals having a frequency greater than the frequency of the said strobe and information select signals produced by the said signal means so that the AC drive waveform selection signals produced across the display cells of said matrix display comprise AC pulses over a strobe interval.

25. The system as set forth in claim 22 wherein the common node of said reference square wave generator means is continuously biased by AC signal means for increasing the threshold level of the said display cells of said matrix display. 

1. A selection system for producing alternating drive waveforms with substantially zero net direct voltage content across the display cells of a matrix display, comprising: first drive circuit means for sequentially providing one part of said alternating drive waveforms applied to each of the respective display terminals of one axis of said matrix display, said first drive circuit means including means to provide unipolar pulses and means coupled to said means to provide unipolar pulses to selectively invert said unipolar pulse to provide a first bipolar pulse train having a given direct voltage component, and second drive circuit means for providing the other part of the said alternating drive waveforms applied to the display terminals of the other axis of said matrix display, said second drive circuit means including means to provide unipolar pulses for selected ones of said display terminals of the said other axis of said matrix display and means coupled to said means to provide unipolar pulses to selectively invert said unipolar pulses to provide a second bipolar pulse train having said given direct voltage component and having pulses in synchronism with and of opposite phases from the pulses of said first bipolar pulse train, said opposite phase bipolar pulses acting to provide the said alternating drive waveforms with substantially zero net direct voltage content across selected ones of the said display cells of said matrix display with the combined amplitudes of said opposite phase bipolar pulses being sufficient to excite said selected ones of the display cells of said matrix display.
 2. The system as set forth in claim 1 wherein reference signal means are coupled to at least one of said first and second drive circuit means so that at least one of said first and second bipolar pulse trains is superimposed upon the reference signals from said reference signal means to form a composite bipolar pulse train signal such that the voltage levels exhibited by said composite bipolar pulse train signal are greater that the voltage levels exhibited by said unipolar pulses in said first and second drive circuit means.
 3. The system as set forth in claim 2 wherein said reference signal means are coupled to each of said first and second drive circuit means so that each of said first and second bipolar pulse trains are superimposed upon the respective reference signals from said reference signal means. 4.. The system as set forth in claim 3 wherein the said means to selectively invert the said unipolar pulse trains in said first and second drive circuit means each include means to provide a binary level voltage waveform and binary level logic circuit means responsive to said binary level voltage waveform to invert the said unipolar pulses therein in dependence upon the logic level of said binary level voltage waveform.
 5. The system as set forth in claim 4 wherein the said means to provide a binary level voltage waveform of said first drive circuit means provides a binary level voltage waveform which is the complement of the binary level voltage waveform provided by the said means to provide a binary level waveform of said second drive circuit means.
 6. The system as set forth in claim 5 wherein the reference signal means coupled to said first drive circuit means produces a waveform which is the complement of the waveform produced by said reference signal means coupled to said second drive circuit means.
 7. The system as set forth in claim 6 wherein the said reference signal means coupled to said first drive circuit means produces a waveform which is in phase and coincidence with the binary level voltage waveform produced by said binary level logic circuit means of said first drive circuit means, and the said reference signal means coupled to said second drive circuit means produces a waveform which is in phase and coincidence with the binary level voltage waveform produced by the said binary level logic circuit means of said second drive circuit means.
 8. The system as set forth in claim 7 wherein the said binary level logic circuit means of each of said first and second drive circuit means produce a binary level waveform having a frequency which is less than the frequency of the said unipolar pulses produced by said first and second drive circuit means so that the said means to selectively invert said unipolar pulses acts to invert alternate ones of the said unipolar pulses in accordance with the binary level of said binary level voltage waveform whereby cell selection is made in the DC strobe pulse mode.
 9. The system as set forth in Claim 7 wherein the said binary level logic circuit means of each of said first and second drive cricuit means produce a binary level waveform having a frequency which is greater than the frequency of the said unipolar pulses produced by said first and second drive circuit means so that the said means to selectively invert said unipolar pulses acts to invert over a subinterval of the pulse interval of said unipolar pulses in accordance with the binary level of said binary level voltage waveform whereby cell selection is made in the AC strobe pulse mode.
 10. The system as set forth in claim 7 wherein the common node of said reference signal means is biased by AC signal means.
 11. The system as set forth in claim 7 wherein said reference signal means and said first and second drive circuit means act to produce the said composite bipolar pulse train signal of an amplitude to provide 2:1 selection of said cells.
 12. The system as set forth in claim 7 wherein said reference signal means and said first and second drive circuit means act to produce the said composite bipolar pulse train signal of an amplitude to provide 3:1 selection of said cells.
 13. The system as set forth in claim 7 wherein said reference signal means and said first and second drive circuit means act to produce the said composite bipolar pulse train signal of an amplitude to provide RMS selection.
 14. The system as set forth in claim 13 wherein the said binary level logic circuit means of said first and second drive circuit means include Exclusive-OR gate means.
 15. The system as set forth in claim 14 wherein said display cells comprise liquid crystal display cells.
 16. A selection system for producing AC drive waveforms across the display cells of a matrix display, comprising; first drive circuitry means for producing strobe signals for sequentially strobing the lines of one axis of said matrix display, said first drive circuitry means including logic gate means associated with each line of said one axis of said matrix display and signal means for providing both a strobe select signal and a strobe square wave signal in synchronism therewith to said logic gate means so as to cause said strobe select signal to be logically inverted in dependence upon the logical level of said strobe square wave signal, each of said first drive circuitry logic gate means and signal means having its common node commonly connected to one another to form a common node for all of said first drive circuitry means, second drive circuitry means for producing information signals for selective lines of the other axis of said matrix display, said second drive circuitry means including logic gate means associated with each line of said other axis of said matrix display and signal means for providing both an information select signal and an information square wave signal in synchronism therewith to said logic gate means so as to cause said information select signal to be logically inverted in dependence upon the logical level of said information square wave signal, each of said second drive circuitry logic gate means and signal means having its common node commonly connected to one another to form a common node for all of said second drive circuitry means, and reference square wave generator means coupled to the said common node of at least one of said first and second drive circuitry means so as to cause at least one of said logically inverted strobe and information select signals to be superimposed upon the reference square wave signals produced by said reference square wave generator means so as to provide composite signals thereby and said AC drive waveforms across the display cells of said matrix display.
 17. The system as set forth in claim 16 wherein the said signal means of said first drive circuitry means produces a strobe square wave signal which is complementary to the said information square wave signal produced by the said signal means of said second drive cIrcuitry means.
 18. The system as set forth in claim 17 wherein the said reference square wave generator means are coupled to the said common node of both said first and second drive circuitry means.
 19. The system as set forth in claim 18 wherein the said reference square wave generator means coupled to the said common node of both said first and second drive circuitry means acts to produce at the said common node of said first drive circuitry means a square wave which is complementary to the square wave produced at the said common node of said second drive circuitry means.
 20. The system as set forth in claim 19 wherein the respective waveforms of said complementary reference square wave signals coupled to the said common node of both said first and second drive circuitry means are the same as the respective waveforms of said complementary strobe and information square wave signals therein, and are in phase and synchronism therewith.
 21. The system as set forth in claim 20 wherein said signal means for providing a strobe select signal act to provide a strobe select signal sequentially a line at a time to the respective x lines of said one axis of said matrix display and the said signal means for providing an information select signal act to coincidently apply an information select signal to the respective y lines of said other axis of said matrix display each time a strobe select signal is applied to an x line.
 22. The system as set forth in claim 21 wherein said first and second drive circuitry logic gate means include Exclusive-OR gates.
 23. The system as set forth in claim 22 wherein said reference square wave generator means producing said complementary reference square wave signals and said signal means of said first and second drive circuitry means producing said strobe and information square wave signals each act to produce signals having a frequency less than the frequency of the said strobe and information select signals produced by the said signal means so that the AC drive waveform selection signals produced across the display cells of said matrix display comprise DC pulses over a strobe interval.
 24. The system as set forth in claim 22 wherein said reference square wave generator means producing said complementary reference square wave signals and said signal means of said first and second drive circuitry means producing said strobe and information square wave signals each act to produce signals having a frequency greater than the frequency of the said strobe and information select signals produced by the said signal means so that the AC drive waveform selection signals produced across the display cells of said matrix display comprise AC pulses over a strobe interval.
 25. The system as set forth in claim 22 wherein the common node of said reference square wave generator means is continuously biased by AC signal means for increasing the threshold level of the said display cells of said matrix display.
 26. The system as set forth in claim 25 wherein the said display cells of said matrix display comprise liquid crystal display cells.
 27. The system as set forth in claim 26 wherein said reference square wave generator means and said first and second drive circuitry means act to produce said composite signals of an amplitude to provide RMS selection.
 28. The system as set forth in claim 26 wherein said reference square wave generator means and said first and second drive circuitry means act to produce said composite signals of an amplitude to provide at least 2:1 selection. 